This invention relates to a process of fabricating a semiconductor device, and more particularly to a method of forming a very shallow emitter diffused-layer of a bipolar transistor.
Bipolar LSIs are, because of their high speed characteristic, used mainly as the central arithemetic/logic elements of the super computer, and recently further required, as the performance becomes higher and higher, to higher speeds.
Such an ultrahigh-speed bipolar transistor is of self-aligned structure in which the emitter and base are formed by the self-aligned technique. An example of this is reported in the Technical Digest of the International Electron Device Meeting, pp. 375-378.
This conventional process of fabricating the emitter diffused-layer described in this report will be set forth. In a transistor-forming region isolated by a field oxide layer, a p.sup.++ type base region is formed. Over the whole surface of an n type semiconductor substrate with p type polysilicon and silicon dioxide films produced and patterned, then a p.sup.- type base region is formed by depositing a BSG film, followed by thermal treatment to diffuse the boron from the BSG film into the substrate. The BSG film is etched by the reactive ion etching (RIE) technique to leave a sidewall insulating-film so that an emitter-formed region is opened. On the entire surface, an impurity-free polysilicon film is deposited by chemical vapor deposition (CVD), implanted with arsenic, and patterned by the combined use of photolithography and dry etching. The subsequent rapid thermal annealing (RTA) is carried out to diffuse arsenic from the n.sup.+ type polysilicon film and boron from the sidewall insulating-film, so that n.sup.+ type emitter region and p.sup.+ type base region are formed, respectively. Thus a transistor is completed. In the last step, a silicon dioxide film is formed over entire substrate. Then, contact holes for metallic electrode interconnection are opened by RIE technique. Next, a titanium nitride film and an aluminium film are deposited by the sputtering technique and then patterned to fabricate an emitter electrode constructed of the aluminium and the underlying titanium nitride films.
This prior art process of producing an emitter diffused-layer has defects which will be described under. The polysilicon film is deposited without doping impurities. Then, the arsenic ions are implanted into the film to make it good conductor. However, according to the ion implantation, the arsenic ions are implanted vertically toward the substrate. Therefore, the ions are well implanted into a level portion of the polysilicon film, for example, formed on the p.sup.+ type polysilicon film, the silicon dioxide film or the p.sup.- type base region. To the contrary, the ions are poorly implanted into a slant portion of the film, for example, formed on the sidewall insulating-film. Accordingly, the film is unevenly doped with the arsenic ions. Consequently, when the impurities are diffused from the polysilicon film to form the emitter region, there generates a problem that an impurity concentration of the emitter region does not become uniform. That is, the impurity concentration of the polysilicon film near the sidewall insulating-film is smaller than that of the film near a central portion of an emitter opening. If the emitter region with uneven impurity concentration is formed, an effective junction area between the emitter and the base regions becomes small. This problem leads to lower operation speed, and is the cause of the dispersion of the element characteristics. These have been problems principally insoluble as far as ion implantation is used.
The present inventor studied a combined technique of growing polysilicon film and simultaneously doping arsenic, the product by which is referred to as arsenic-polysilicon film hereinafter. An arsenic-polysilicon film is grown by the deposition with a mixed gas of SiH.sub.4 and AsH.sub.3 heated at 550.degree. to 600.degree. C. and in vacua (about 0.1 Torr). Using a transistor fabricated by growing an arsenic-polysilicon film of 150 to 200 nm thick, a desired operation speed could be obtained.
A new problem however occurred which will be described below. When arsenic is contained in the arsenic-polysilicon film at concentrations of 10.sup.21 cm.sup.-3 or higher to form an emitter region having uniform impurity concentration,
(A) A film-forming rate was 0.5 or less nm/min, and it took 300 to 400 minutes, therefore not practical;
(B) In the process of growing an insulating film on the arsenic-polysilicon film and opening therein holes for metallic electrode connection, dry etching by RIE technique was studied with various gases. No adequate selectivity was obtained, with the result that the arsenic-polysilicon film was etched. In many cases alloy spiking occurred when the metallic electrode was deposited, and leakage from the transistors was observed.